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pm:lab:lab0xc0-6 [2020/04/27 21:13] iuliana.brinzoi [Example] |
pm:lab:lab0xc0-6 [2020/05/02 21:33] (current) dumitru.tranca [SPI (Serial Peripheral Interface)] |
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For CPHA=0 data is **generated before the leading edge** (first edge of the clock), and is sampled on the leading edge (rising for CPOL=0 and falling for CPOL=1). | For CPHA=0 data is **generated before the leading edge** (first edge of the clock), and is sampled on the leading edge (rising for CPOL=0 and falling for CPOL=1). | ||
- | For CPHA=0 data is **generated on the leading edge** (first edge of the clock), and is sampled on the trailing edge (falling for CPOL=0 and rising for CPOL=1). | + | For CPHA=1 data is **generated on the leading edge** (first edge of the clock), and is sampled on the trailing edge (falling for CPOL=0 and rising for CPOL=1). |
+ | |||
+ | CPOL and CPHA must be set accordingly to the SPI device configuration that we are communicating with. | ||
+ | E.g. If our uC communicates with an ADC that uses CPOL=1 and CPHA=1 it is mandatory to configure our SPI master in with the same parameters. | ||
===== SPI in Atmega324 ===== | ===== SPI in Atmega324 ===== |