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This shows you the differences between two versions of the page.
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pm:lab:lab0xc0-6 [2020/04/26 23:11] alice_florenta.suiu [Tasks] |
pm:lab:lab0xc0-6 [2020/05/02 21:33] (current) dumitru.tranca [SPI (Serial Peripheral Interface)] |
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| For CPHA=0 data is **generated before the leading edge** (first edge of the clock), and is sampled on the leading edge (rising for CPOL=0 and falling for CPOL=1). | For CPHA=0 data is **generated before the leading edge** (first edge of the clock), and is sampled on the leading edge (rising for CPOL=0 and falling for CPOL=1). | ||
| - | For CPHA=0 data is **generated on the leading edge** (first edge of the clock), and is sampled on the trailing edge (falling for CPOL=0 and rising for CPOL=1). | + | For CPHA=1 data is **generated on the leading edge** (first edge of the clock), and is sampled on the trailing edge (falling for CPOL=0 and rising for CPOL=1). |
| + | |||
| + | CPOL and CPHA must be set accordingly to the SPI device configuration that we are communicating with. | ||
| + | E.g. If our uC communicates with an ADC that uses CPOL=1 and CPHA=1 it is mandatory to configure our SPI master in with the same parameters. | ||
| ===== SPI in Atmega324 ===== | ===== SPI in Atmega324 ===== | ||
| Line 100: | Line 103: | ||
| SPDR0 = data; | SPDR0 = data; | ||
| - | /* Wait for transmission complete */c | + | /* Wait for transmission complete */ |
| while(!(SPSR0 & (1 << SPIF0))); | while(!(SPSR0 & (1 << SPIF0))); | ||
| </code> | </code> | ||
| Line 117: | Line 120: | ||
| ===== Tasks ===== | ===== Tasks ===== | ||
| Sketch is available here: {{:pm:lab:lab5.zip|}} | Sketch is available here: {{:pm:lab:lab5.zip|}} | ||
| - | * Output Shift Register - 74HC595 - | + | |
| + | * Output Shift Register - {{http://www.ti.com/lit/ds/symlink/sn74hc595.pdf?ts=1587912861287&fbclid=IwAR0fUJqcsQ_rJIcTdt7z25uKUitrbiN3ye15k9VJgRcN0QAj4cDbKgaGzVA |74HC595 - Datasheet}} | ||
| + | * Input Shift Register - {{https://assets.nexperia.com/documents/data-sheet/74HC_HCT597.pdf?fbclid=IwAR1VcJfHyrg_61rOJah8WOFUdEidt7VKpIpAEb3FkntvsEeq6PMC810g1os |74HC597 - Datasheet}} | ||
| <hidden> | <hidden> | ||
| Solution is available here:{{:pm:lab:florin_salam_cel_mai_smecher_manelist.zip|}} | Solution is available here:{{:pm:lab:florin_salam_cel_mai_smecher_manelist.zip|}} | ||
