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ac-is:teme-ie:proiect [2023/12/10 21:38]
ionut.pascal
ac-is:teme-ie:proiect [2024/01/07 18:47] (current)
ionut.pascal old revision restored (2023/12/13 23:58)
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 ====== Floating point multiplication automata ====== ====== Floating point multiplication automata ======
  
-  * Deadline: **22.12.2023**,​ **23:59** +  * Soft Deadline: **22.12.2023**, **23:59** 
-  * Publish date: **11.12.2022** +  * Hard Deadline: **28.12.2023**, **23:59** 
-  * Last update: **11.12.202200:00**+  * Publish date: **13.12.2023** 
 +  * Last update: **13.12.202323:50**
   * History:   * History:
-    * 11.12.202200:00+    * 13.12.202323:50
       * Publish the assignment       * Publish the assignment
  
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 ===== Description and requirements ===== ===== Description and requirements =====
  
 +Floating point has a long history in the engineering field and in computer science. The promoter was Leonardo Torres Quevedo back in 1914; nowadays, we use IEEE754 Standard Implementation. [[https://​en.wikipedia.org/​wiki/​Floating-point_arithmetic|Wiki]]
 +The assignment consists in implementing a floating point multiplication algorithm for 2 numbers with the following format (S_EEEE_MMMMMMM):​
 +  * 1 sign bit - S
 +  * 4 exponent bits - E
 +  * 7 mantissa bits - M
 +The implementation can follow the proposed state machine:
 +{{ :​ac-is:​teme-ie:​untitled_diagram.jpg?​nolink |}}
 +Because we encounter a multiplication of fixed point (mantissa), we should implement a dedicated module responsible for this operation. The Booth algorithm is a suitable option which reduces the complexity but keeps a good understanding behind. The size of the operands is dependent on the size of the mantissa.
 +
 +Requirements:​
 +  - Implement Booth algorithm in the dedicated file for 2 8bit operands:
 +    - Take 2 random 8bit numbers of your choice and demonstrate the algorithm on the paper;
 +    - Implement the Verilog code.
 +  - Implement the floating point multiplication algorithm:
 +    - Take 2 random 12bit numbers of your choice which respects the floating point format and demonstrate the multiplication on the paper;
 +    - Implement the Verilog code.
 +
 +<note important>​Don'​t forget to follow the TODO's inside the code and check for the errors and messages in the console! Checking is implemented inside the testcase!</​note>​
 +     
 ===== Implementation ===== ===== Implementation =====
  
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 ==== floating_point_fsm ==== ==== floating_point_fsm ====
-Finite state machine ​implementation, this module also acts as a top module for the design (the one that have all the additional modules instantiated in it).+Finite state machine ​to be implemented, this module also acts as a top module for the design (the one that have all the additional modules instantiated in it).
  
 This module respects the following interface: This module respects the following interface:
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 This module actively used the ''​booth_mul''​ module to perform any multiplication operations needed. This module actively used the ''​booth_mul''​ module to perform any multiplication operations needed.
 +
 +==== booth_mul ====
 +Implements the Booth multiplication algorithm applied on 2 8bit numbers. This module uses combinational logic - the result is available as soon as the inputs change.
 +
 +This module respects the following interface:
 +<code systemverilog>​
 +module booth_mul(
 +        input [7:0] op1,
 +        input [7:0] op2,
 +        output [15:0] result
 +    );
 +</​code>​
 +The signals'​ description for this module is:
 +  * ''​op1'' ​ - holds the operand 1;
 +  * ''​op2'' ​ - holds the operand 2;
 +  * ''​result'' ​  - holds the result;
 +<note tip>
 +Modifying the outputs to ''​output reg''​ is allowed for this module.
 +</​note>​
 +
 +The module functionality is:
 +  * Trigger the algorithm and change the ''​result''​ every time ''​a''​ or ''​b''​ changes.
  
 ===== Notes ===== ===== Notes =====
  
-  * For the floating point implementation,​ the behavior of the register is the one studied in the lab.+  * For the floating point implementation,​ the behavior of the register is the one studied in the [[ac-is:lab-ie:​lab02#​The Register|lab]].
   * You can modify the state machine as you like, as long as it respects the requirements.   * You can modify the state machine as you like, as long as it respects the requirements.
 +  * For VIVADO, the top module for simulation is the booth test; when implementing the floating point multiplication,​ don't forget to change the test
    
  
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       * general presentation of your solution;       * general presentation of your solution;
       * description of any complex coding parts that you consider additional explanation is needed and they are too long to be an inline comment;       * description of any complex coding parts that you consider additional explanation is needed and they are too long to be an inline comment;
 +    * Pictures/​Scans of your paper demonstrations.
   * The archive shall __**not**__ contain any other files from the implementation folder (i.e. test files, project specific files, etc).   * The archive shall __**not**__ contain any other files from the implementation folder (i.e. test files, project specific files, etc).
  
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   * +10.0 pts.: Correct implementation with the tests passing   * +10.0 pts.: Correct implementation with the tests passing
-    * 6.0 pts.: Multiplication ​Module +    * 0.5 pts.: Booth Multiplication ​Example - 2 8bit numbers on your choice 
-    * 4.0 pts.: IEEE754 ​Multiplication+    * 5.5 pts.: Multiplication Module 
 +    * 0.5 pts.: Floating Point Multiplication ​Example - 2 12bit numbers with the specified format of your choice 
 +    * 3.5 pts.: Floating Point Multiplication 
 +    * 0.5 pts.: (bonus) Add your numbers in the test file; verify there is a match.
   * -10.0 pts.: using looping instructions with variable steps (i.e. while x > 0);   * -10.0 pts.: using looping instructions with variable steps (i.e. while x > 0);
-  * -6.0 pts.:  using * operator;+  * -6.0 pts.:  using * operator ​in the booth_mul implementation; 
 +  * -1.0 pts.:  not using the ''​booth_mul''​ module for implementing the FSM
   * -1.0 pts.:  the absence of the README file;   * -1.0 pts.:  the absence of the README file;
   * -1.0 pts.:  bad coding style (chaotic indentation,​ irregular spacing, strange naming for variables, etc.);   * -1.0 pts.:  bad coding style (chaotic indentation,​ irregular spacing, strange naming for variables, etc.);
   * -0.5 pts.:  incorrect using of continuous assignments ( assign ), procedural blocking ( = ) and non-blocking ( <= ) assignments;​   * -0.5 pts.:  incorrect using of continuous assignments ( assign ), procedural blocking ( = ) and non-blocking ( <= ) assignments;​
 +  * -0.5 pts.:  /day if submitted after the soft deadline;
   * -0.2 pts.:  other generic implementation issues (/issue);   * -0.2 pts.:  other generic implementation issues (/issue);
   * -0.1 pts.:  useless code comments.   * -0.1 pts.:  useless code comments.
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 ===== Recourses ===== ===== Recourses =====
-  * **VIVADO Project Files** - {{:​ac-is:​teme-ie:proiect:​lab_project_vivado.zip| skel_vivado}} +  * **VIVADO Project Files** - {{:​ac-is:​teme-ie:​lab_project_vivado.zip| skel_vivado}} 
-  * **XILINX Project Files** - {{:​ac-is:​teme-ie:proiect:​lab_project_xilinx.zip| skel_xilinx}} +  * **XILINX Project Files** - {{:​ac-is:​teme-ie:​lab_project_xilinx.zip| skel_xilinx}} 
-  * **IEEE754 Multiplication Article** -  +  * **IEEE754 Multiplication Article** - {{ac-is:​teme-ie:​c0383011016.pdf| Implementation and Simulation of Ieee 754 Single-Precision Floating Point Multiplier}} 
- +  * **Booth ​Multiplication ​Algorithm** ​      [[https://​en.wikipedia.org/​wiki/​Booth%27s_multiplication_algorithm|Wiki]] 
-  * Multiplication ​algorithms ​- wiki+  * **Booth Multiplication Another Example** - [[https://​www.javatpoint.com/​booths-multiplication-algorithm-in-coa|Click]]
  
-===== Anexă ​=====+===== Appendix ​=====
ac-is/teme-ie/proiect.1702237107.txt.gz · Last modified: 2023/12/10 21:38 by ionut.pascal
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