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ac-is:teme-ie:course_project [2026/01/07 19:10] ionut.pascal [Grading] |
ac-is:teme-ie:course_project [2026/01/17 21:40] (current) ionut.pascal [MARIE - Extend the ISA] |
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| ====== MARIE - Extend the ISA ====== | ====== MARIE - Extend the ISA ====== | ||
| - | * Deadline: **17.01.2026**, **23:59** | + | * Deadline: <del>**17.01.2026**, **23:59**</del> **18.01.2026**, **11:59** |
| * Publish date: **07.01.2026** | * Publish date: **07.01.2026** | ||
| - | * Last update: **07.01.2026, 19:05** | + | * Last update: **17.01.2026, 21:35** |
| * History: | * History: | ||
| * 07.01.2026, 19:05 | * 07.01.2026, 19:05 | ||
| * Assignment published, without the code skeleton and associated tests. | * Assignment published, without the code skeleton and associated tests. | ||
| + | * 14.01.2026, 17:05 | ||
| + | * Update the skeleton and provide sanity tests for each instruction; Add flags port in the ''control_unit.v''; use it for SkipCond | ||
| + | * Update the implementation section with testing istructions | ||
| + | * 17.01.2026, 21:35 | ||
| + | * Typo found in RAM.v for LoadI testcase | ||
| + | * Increase deadline | ||
| + | <note important>**There is no fix provided in skeleton!** Please do a local change as suggested on the forum!</note> | ||
| + | |||
| ===== Objectives ===== | ===== Objectives ===== | ||
| Line 26: | Line 34: | ||
| - | ===== Implementation ===== | + | ===== Implementation & Testing===== |
| The file to be modified is ''control_unit.v''. Several distinct states must be introduced for each instruction to achieve the required functionality. The micro-operations outlined in the simulator should be used as a guide. Each micro-operation should be associated with its own separate state. | The file to be modified is ''control_unit.v''. Several distinct states must be introduced for each instruction to achieve the required functionality. The micro-operations outlined in the simulator should be used as a guide. Each micro-operation should be associated with its own separate state. | ||
| <note important>In the simulator, you may begin with a basic example. After assembling and executing the program in micro-step mode, you will be able to observe each instruction being carried out step-by-step. Your implementation may follow it!</note> | <note important>In the simulator, you may begin with a basic example. After assembling and executing the program in micro-step mode, you will be able to observe each instruction being carried out step-by-step. Your implementation may follow it!</note> | ||
| - | {{ :ac-is:teme-ie:jns.jpg?link&700 |}} | + | {{ :ac-is:teme-ie:jns.jpg?link&700 | RTN instruction description using the simulator}} |
| + | |||
| + | For validation purposes, multiple tests were developed to ensure the correctness of the implementation. Test 0 runs by default and is expected to pass. When implementing a specific instruction, switch to the corresponding ''define''. Each test includes both previously implemented instructions and the instruction under test; therefore, the tasks are independent and have no dependencies on one another. | ||
| + | |||
| + | <code> | ||
| + | `define test_legacy 0 //legacy test for all the lab implemented instructions | ||
| + | `define test_subst 1 //simple test for Subst | ||
| + | `define test_jns 2 //simp test for JNS | ||
| + | `define test_loadI 3 //simp test for LoadI | ||
| + | `define test_loadImmi 4 //simp test for LoadImmi | ||
| + | `define test_skipCond 5 //simp test for SkipCond | ||
| + | |||
| + | parameter test_scenario = `test_legacy; //Change the desired test here | ||
| + | </code> | ||
| + | |||
| + | After the test completes, the first indication of your implementation’s correctness is in the log message (see the images below). If the test passes, great job ^_^ ! If the test fails, debug it step by step by analyzing the waveform and comparing it with the assembly program. The ''.asm'' instructions are available in the ''ram.v'' file; load them into the MARIE simulator and run them for reference. | ||
| + | |||
| + | {{ :ac-is:teme-ie:pass_message.jpg?nolink&700 | Pass Messaage}} | ||
| + | |||
| + | {{ :ac-is:teme-ie:fail_message.jpg?nolink&700 | Fail Messaage}} | ||
| ===== Notes ===== | ===== Notes ===== | ||
| Line 63: | Line 90: | ||
| * -1.0 pts.: incorrect using of continuous assignments ( assign ), procedural blocking ( = ) and non-blocking ( <= ) assignments; | * -1.0 pts.: incorrect using of continuous assignments ( assign ), procedural blocking ( = ) and non-blocking ( <= ) assignments; | ||
| * -0.2 pts.: other generic implementation issues (/issue); | * -0.2 pts.: other generic implementation issues (/issue); | ||
| - | * -0.1 pts.: useless code comments. | + | * -0.1 pts.: useless code comments; |
| + | * +0.5 pts.: bonus for original implementation. | ||
| Even if the test(s) are not passing, each instruction may account for up to 25% of it's associated points if you clearly explain he underlying approach in the README file. The submitted code **must compile successfully**. | Even if the test(s) are not passing, each instruction may account for up to 25% of it's associated points if you clearly explain he underlying approach in the README file. The submitted code **must compile successfully**. | ||
| + | The final score will be scaled in the Grade section according to the weighting defined at the beginning of the course. | ||
| ===== Recourses ===== | ===== Recourses ===== | ||
| * **MARIE Simulator** - [[https://marie.js.org |MARIE Sim ]] | * **MARIE Simulator** - [[https://marie.js.org |MARIE Sim ]] | ||
| + | * **VIVADO Project Files** - {{:ac-is:teme-ie:proj_skel.zip| skel_vivado}} | ||
| <ifauth @ac-is> | <ifauth @ac-is> | ||
| - | **VIVADO Project Files** - {{:ac-is:teme-ie:MARIEproject_vivado.zip| skel_vivado}} | + | |
| </ifauth> | </ifauth> | ||
| ===== Appendix ===== | ===== Appendix ===== | ||
