Differences
This shows you the differences between two versions of the page.
|
ac-is:lab-ie:lab01 [2023/11/07 21:42] ionut.pascal [Home assignment] |
ac-is:lab-ie:lab01 [2023/11/07 22:46] (current) ionut.pascal [Home assignment] |
||
|---|---|---|---|
| Line 28: | Line 28: | ||
| * //Hint//: You should modify the interface and the logic inside. | * //Hint//: You should modify the interface and the logic inside. | ||
| * //Hint//: A complete testing shall exercise all of the inputs. | * //Hint//: A complete testing shall exercise all of the inputs. | ||
| - | - **(4p)** Implement a 8bit multiplier, with 2 inputs and one output. | ||
| - | * //Hint//: Take as reference the adder8 module. | ||
| - | * //Hint//: What is the size of the output? Consider the highest 8bit number. | ||
| - **(3p)** Change the implementation of the comparator, following the rules below: | - **(3p)** Change the implementation of the comparator, following the rules below: | ||
| * Implement it using if constructs, using a procedural block; | * Implement it using if constructs, using a procedural block; | ||
| * Change the size of the inputs to 6 bits. | * Change the size of the inputs to 6 bits. | ||
| * //Hint//: Do not forget to use the reg type when needed! | * //Hint//: Do not forget to use the reg type when needed! | ||
| - | - **(4p)** Implement a tiny ALU (**A**rithmetical **L**ogical **U**nit), that shall be able to execute 16bit ADD and SUB operations. The ALU has 2 inputs, op1 (16bits) and op2(16bits) and 2 outputs, result(16bits) and carry(1bit). | + | * //Note//: In procedural blocks, the outputs shall have a value at any moment so that they do not become memory components at the synthesis level. Considering this, it is useful to initialize them in the beginning. |
| + | - **(4p)** Implement a 8bit multiplier, with 2 inputs and one output. | ||
| + | * //Hint//: Take as reference the adder8 module. | ||
| + | * //Hint//: What is the size of the output? Consider the highest 8bit number. | ||
| + | - **(4p)** Implement a tiny ALU (**A**rithmetical **L**ogical **U**nit), that shall be able to execute 16bit ADD and SUB operations. The ALU has 3 inputs, op1 (16bits), op2(16bits), sel(1bit) and 2 outputs, result(16bits) and carry(1bit). | ||
| + | * //Hint//: Sel input selects the operation that is executed: 0 - ADD, 1 - SUB | ||
| * //Hint//: You can use the concatenate operator { } in order to make the result a 17bit variable! | * //Hint//: You can use the concatenate operator { } in order to make the result a 17bit variable! | ||
| * //Note//: When you operate the ALU inside a CPU, you have a fixed length bus available for all the data. | * //Note//: When you operate the ALU inside a CPU, you have a fixed length bus available for all the data. | ||
