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ac-is:lab-ie:lab01 [2023/11/07 17:11]
ionut.pascal
ac-is:lab-ie:lab01 [2023/11/07 22:46] (current)
ionut.pascal [Home assignment]
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 ==== Home assignment ==== ==== Home assignment ====
 For the home assignment, you should use the corresponding resources from below. For the home assignment, you should use the corresponding resources from below.
-  - **(2p)** Change the adder8 module from exercise 1 by including a carry bit as an additional input. You can use any of //a// or //b// implementation.+  - **(2p)** Change the adder8 module from exercise 1 by including a carry bit as an additional input. You can use any of //a// or //b// implementation. Add at least 5 data sets in adder8_test.sv,​ which will exercise the module and upload a screenshot with the simulation waveform to emphasize them.
         * //Hint//: You should modify the interface and the logic inside.         * //Hint//: You should modify the interface and the logic inside.
-  - **(4p)** Implement a 8bit multiplier, with 2 inputs and one output. +        ​* //​Hint//: ​A complete testing shall exercise all of the inputs.
-        ​* //​Hint//: ​Take as reference the adder8 module. +
-        * //Hint//: What is the size of the output? Consider the highest 8bit number.+
   - **(3p)** Change the implementation of the comparator, following the rules below:   - **(3p)** Change the implementation of the comparator, following the rules below:
         * Implement it using if constructs, using a procedural block;         * Implement it using if constructs, using a procedural block;
         * Change the size of the inputs to 6 bits.         * Change the size of the inputs to 6 bits.
         * //Hint//: Do not forget to use the reg type when needed!         * //Hint//: Do not forget to use the reg type when needed!
-  ​- **(4p)** Implement a tiny ALU (**A**rithmetical **L**ogical **U**nit), that shall be able to execute 16bit ADD and SUB operations ​+        * //Note//: In procedural blocks, the outputs shall have a value at any moment so that they do not become memory components at the synthesis level. Considering this, it is useful to initialize them in the beginning. 
 +  - **(4p)** Implement a 8bit multiplier, with 2 inputs and one output. 
 +        * //Hint//: Take as reference the adder8 module. 
 +        * //Hint//: What is the size of the output? Consider the highest 8bit number. 
 +  ​- **(4p)** Implement a tiny ALU (**A**rithmetical **L**ogical **U**nit), that shall be able to execute 16bit ADD and SUB operations. The ALU has 3 inputs, op1 (16bits), op2(16bits),​ sel(1bit) and 2 outputs, result(16bits) and carry(1bit). 
 +        * //Hint//: Sel input selects the operation that is executed: 0 - ADD, 1 - SUB 
 +        * //Hint//: You can use the concatenate operator { } in order to make the result a 17bit variable! 
 +        * //Note//: When you operate the ALU inside a CPU, you have a fixed length bus available for all the data.
  
 ===== Resources ===== ===== Resources =====
ac-is/lab-ie/lab01.1699369888.txt.gz · Last modified: 2023/11/07 17:11 by ionut.pascal
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