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The RP2040 microcontroller from Raspberry Pi offers two built-in UART peripherals for serial communication. Here's a basic introduction to using UART with Pico-SDK, including configuration, sending, and receiving data:
#include <hardware/uart.h>
// Configure UART0 at 115200 baud, 8N1 format int baudrate = 115200; uart_init(uart0, baudrate); //uart_set_format(uart, 8, 1, UART_PARITY_NONE); // Set the TX and RX pins by using the function select on the GPIO 0 and 1 gpio_set_function(0, GPIO_FUNC_UART); gpio_set_function(1, GPIO_FUNC_UART);
const char* message = "Hello from RP2040!\n"; // Example 1: Sending a string with uart_puts uart_puts(uart0, message); // Example 2: Sending raw data with uart_write_blocking uint8_t data[] = {0x41, 0x42, 0x43}; // Example data bytes int written = uart_write_blocking(uart0, data, sizeof(data));
int received_char; // Example 1: Reading a single character while (uart_is_readable(uart0)) { received_char = uart_getc(uart0); // Process received character (e.g., print it) } // Example 2: Reading data into a buffer with a timeout uint8_t buffer[10]; int num_read = uart_read_blocking(uart0, buffer, sizeof(buffer), 100); // Wait 100ms for data if (num_read > 0) { // Process received data in the buffer }
A hardware interrupt is a type of exception which is a synchronous or asynchronous signal from a peripheral that signals the occurrence of an event that must be handled by the processor. Interrupt handling has the effect of suspending a program's normal thread of execution and launching an interrupt service routine (ISR).
Generally, to associate an interrupt with a specific routine in the program, the processor uses the interrupt vector table (IVT). In this table, each interrupt is associated with the address to which the program will jump when the interrupt is triggered. These addresses are predefined and are mapped in program memory.
When an interrupt request happens the first thing that the processor does is to memorize its current state. For ARM Cortex-M0 this happens by pushing 8 words or registered data into the main stack to provide the information need to return the processor to what it was doing before before the interrupt request was called. This part is called the stack frame and it includes registers 0 through 3, register 12, the link register, the program counter and the program status register.
ARM Cortex-M microcontrollers also use a Nested Vectored Interrupt Controller (NVIC). The NVIC is specifically designed to handle these interrupts more efficiently. Interrupt addresses in the NVIC memory region are set according to their priority: the lower the address, the higher the priority. As suggested by the “Nested” in its name, the NVIC supports nested interrupts. This means that if a higher priority interrupt occurs while another interrupt is being processed, the controller can pause the current interrupt service routine (ISR), handle the higher priority interrupt, and then resume the interrupted ISR. This feature is crucial for responsive and real-time processing.
The RP2040 boots from an internal bootloader that sets the initial interrupt IVT. The before starting the actual code written into Flash, the internal bootloader loads a secondary bootloader that is written in Flash (the first 256 bytes) together with the developer's app. The IVT that the Flash application provides start after the secondary bootloader, at address 0x100.
The RP2040 chip has two cores (processors), and each core has its own NVIC. Each core's NVIC is connected to the same set of hardware interrupt lines with one exception: IO Interrupts. In the RP2040, IO interrupts are organized by banks, and each core has its own set of IO interrupts for each bank. The IO interrupts for each core are completely independent. For instance, Processor 0 (Core 0) can be interrupted by an event on GPIO pin 0 in bank 0, while Processor 1 (Core 1) can be interrupted by a separate event on GPIO pin 1 in the same bank. Each processor responds only to its own interrupts, allowing them to operate independently or to handle different tasks simultaneously without interfering with each other.
On RP2040, only the lower 26 IRQ signals are connected on the NVIC, as seen in the table below, and IRQs 26 to 31 are tied to zero (never firing). The core can still be forced to enter the relevant interrupt handler by writing bits 26 to 31 in the NVIC ISPR register.
The priority order is determined for these signals is determined by :
All GPIO pins in Raspberry Pi Pico support interrupts. The interrupts can be classified into three types: