`timescale 1ns / 1ps
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// Company: 
// Engineer: 
// 
// Create Date: 11/07/2023 12:05:37 AM
// Design Name: 
// Module Name: mux4_1
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
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//TODO: Add the implementation of the module mux4_1, including the interface
//	   - Don't change the name of the module or the name of the variables!
//     - Both implementations shall be tested one at a time
//     output: 
//           - the output:    out            (1bit)
//     inputs: 
//           - the inputs:    i1, i2, i3, i4 (1bit)
//           - the selection: sel            (2bits)
